Asmore writes are performed, the algorithm continues towrite the information similarly as provided in Table 4through Table 6. As provided in Table 3, this information isstored in the first available location in the page. In this example, a write operation has been performedto store a data value of 0x0202 to data EEPROMaddress, 0x2. Afterinitialization, the first page is designated as the activepage.
#Mplab c30 3.31 serial update
This information is not directly accessibleby the user, but is used by the algorithm to find theavailable pages and update status flags. This indicates whether a page is active orexpired, and how many erase/write cycles have beenperformed. PIC24/dsPIC33F/dsPIC33E Case ExampleTo understand how the algorithm works, a simple caseexample for the PIC24/dsPIC33F/dsPIC33E isdescribed in this section.Īfter the first page of each EEPROM bank is initialized,the first location is reserved for the page statusinformation. This location is an 8-bit operation for PIC18,and either an 8-bit or 16-bit operation for PIC24/dsPIC33F/dsPIC33E, depending on whether an odd/even address is being written. The algorithm takes advantage of the PIC MCU abilityto self-program a single location of the programmemory. DS01095D-page 1ĭATA EEPROM INFORMATION FORMAT IN PROGRAM MEMORY Each EEPROMcan have a maximum of 255 addresses.Therefore, the total addresses are from0 to N x 255 - 1, where N = the number ofEEPROM banks.Ģ011 Microchip Technology Inc. Note: The PIC18 and PIC24/dsPIC33F/dsPIC33E implementations supportmultiple EEPROM banks. Refer to the specificdevice data sheet to verify the availabilityof this feature. Note: To use this solution, the device must haveword write capability. TABLE 1: PIC18 DATA EEPROM INFORMATION FORMAT IN PROGRAM MEMORYĪuthor: David Otten, Stephen Cowden and Pradeep BudaguttaMicrochip Technology Inc. For these formats, refer to Table 1and Table 2. Due to architectural differences of theprogram memory, the emulated data EEPROMinformation is stored differently for 8-bit and 16-bitimplementations. PIC18 implementation supports 8-bit data and multipleEEPROM banks PIC24/dsPIC33F/dsPIC33Eimplementation supports 16-bit data and multipleEEPROM banks. THEORY OF OPERATIONThe algorithm in this application note supportsselectable, multiple emulated data EEPROMs with atotal size of up to multiples of 255 locations, with asingle address space, ranging from 0 to the total size ofthe emulated data EEPROMs minus one (see thebelow note).įor example, if the implemented size of the dataEEPROM is five, and two data EEPROMs are used,only the addresses in the range, 0 to 9, are available. The PIC18 implementationuses two locations and PIC24/dsPIC33F/dsPIC33Euses one location. Page Status Program memory locations at thebeginning of the current page that stores dataEEPROM emulation status. Packed Page The new current page after the packroutine is complete. Retention A specification indicating the minimum timeand associated conditions for the retention of data inFlash program memory.Įffective Endurance The improved endurance of theemulated data EEPROM as a result of using anefficient programming algorithm.Ĭurrent (Active) Page A page in program memorythat is being written and read by the data EEPROMemulation algorithm. Row The maximum amount of program memoryaffected by a programming operation.Įrase/Write Cycle The number of erase and writeoperation pairs.Įndurance A specification indicating the maximumnumber of erase/write cycles and associated conditions. This algorithm features aninterface similar to an internal data EEPROM whichuses available program memory and can improveendurance by a factor as high as 500.ĭefinition of TermsPage The minimum amount of program memoryaffected by an erase operation. This application note presents a third alternative thataddresses these issues. The alternate solution of using an external, serialEEPROM device may not be appropriate forcost-sensitive or pin-constrained applications. Applications that need to frequently updatethis data may have greater endurance requirementsthan the specified Flash endurance for the MCUs/Digital Signal Controllers (DSCs) devices. Many applications store nonvolatile information in theFlash program memory using table read and writeoperations. INTRODUCTIONMicrochip Technology Inc., has expanded its productportfolio to include a wide variety of cost-effective PICMicrocontrollers (MCUs) without an internal dataEEPROM. Microcontrollers and dsPIC Digital Signal Controllers AN1095Emulating Data EEPROM for PIC18 and PIC24
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